EXECUTIVE SUMMARY

The present document describes the test plan methodology for the ASIC readout for the accelerometer and strain sensor. It contains the basic information that is required to have the ASIC characterized regarding its performance in the DC, AC, Transient and Noise.

It also defines how parameters such as resolution, accuracy, linearity, etc have to be measured and compared to simulations. All measurements have to be done within the standard PVT (Process Voltage Temperature) corners. A thorough explanation of Noise test-bench is given and several diagrams are provided that explain the IOs, bias and external components required for the test of the ASIC.

Finally comparisons and conclusions about the ASIC are given and guidelines are also stated for the proper interpretation of the test results.